Artekit is proud to be the first to sell this popular board.

The OpenJTAG Project is an open source hardware and software for a high speed USB JTAG tool.

The FT245 is the USB front end, converting USB serial data to parallel bus to interface with the EPM570 CPLD. The CPLD latches the parallel data and executes macro-instruction commands, driving the main five JTAG signals: TCK, TMS, TDI, TDO and TRST.

Inside the CPLD there is a synthesized clock divisor to work with slower target devices. The highest TCK frequency is 24 MHZ (main clock / 2) and the lowest frequency is 187.5 KHZ.

The board has 8 input/output pins to be used as general purpose I/O.

The PCB size is 57.2mm x 43.3mm (2.26″ x 1.7″) and fits inside the Altera USB Blaster plastic box, and it is pin-to-pin compatible. The same JTAG flat cable can be used.

You can modify the VHDL code to adapt it to fit different uses. The board can be used as CPLD development kit too.

The AK-OPENJTAG series board is an EXPERIMENTAL BOARD based on the OpenJTAG Project specifications. Artekit Labs does not guarantees in any way the faultless operation, reliability or stability of the board. Artekit Italy only provides the hardware, being it mounted or as a bare empty board, electrically tested.

Features

• 1 two-layer PCB
• 1 FTDIChip FT245BL USB to Parallel converter
• 1 Altera EPM570T100 TQFP100 CPLD
• 1 generic 93C46 serial EEPROM
• 1 IQD SPXO018043 48 MHZ oscillator
• 1 generic HC49 6MHZ quartz
• 1 ST Microelectronics LK112M33TR 3.3V LDO regulator
• 2 Texas TXS0104 bidirectional level converter

Documents

• Schematics diagram V1.1
• Bill of Materials
• PCB Component Mask
• PCB Top View
• PCB Bottom View
• Gerber Files
• Hardware User Manual V1.0
• Protocol Manual V1.1

Software

• Quartus II VHDL Project V1.4
• Test program source code in Visual Studio 6
• New OpenOCD 7 driver source code
• OpenOCD driver source code (original version)